![]() ![]() The converters using the integration method can be sub-divided into a voltage-time conversion type and a voltage-frequency conversion type. There are generally two types of conversion methods employed by ADCs: an integration method and a comparison method. Many different ADCs have been developed for specific applications in certain technologies. Therefore, it is essential to convert data having analog values to data having digital values to permit effective interaction between humans and computers. Most of the information used by humans are of analog values, while most of the data processed by a variety of computers are of digital values. The present invention relates to an analog-to-digital converter (hereinafter, "ADC"), and more particularly to a feedback comparison type ADC. An analog to digital converter according to claim 1, wherein each said amplifier comprises two CMOS inverters connected in series. An analog to digital converter according to claim 3, wherein said conductance value of each said transistor is set with a geometrical aspect ratio W/L.ĥ. Wherein said connecting weight of each said transistor corresponds to a conductance value thereof.Ĥ. An analog to digital converter according to claim 2, Wherein said first group of transistors are PMOS transistors and said second and third groups of transistors are NMOS transistors.ģ. ![]() An analog to digital converter according to claim 1, An analog to digital converter which converts analog signals into Nbit digital signals comprising Ī plurality of amplifiers corresponding to each bit of said digital signals, each of said amplifiers having a corresponding input line Ī first group of transistors for connecting a first power source in common with each said input line of said amplifiers, having a connecting weight in accordance with a level change of said analog signals Ī second group of transistors for connecting a second power source in common with each said input line of said amplifiers, said second group of transistors having connecting weights with weighting values of each bit of Nbits when applying said first power source Ī third group of transistors for selectively connecting said second power source in common with each said input line of the amplifiers corresponding to lower order bits in accordance with output values output from the amplifiers corresponding to higher order bits, said third group of transistors having connecting weights with weighting values indicative of the output of the amplifiers corresponding to the higher order bits Ī plurality of inverters for inverting each output of said amplifiers.Ģ. ![]()
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